1. Field of the Invention
The present invention relates to a switching control circuit.
2. Description of the Related Art
With respect to a switching power supply circuit configured to generate an output voltage of a target level from an input voltage, a power supply circuit of a type called a ripple converter or a hysteresis control regulator (see, e.g., Japanese Laid-Open Patent Publication No. 2004-104942) is known. FIG. 19 depicts one example of a ripple converter 300 of a common fixed-on-time system. When a feedback voltage Vfb corresponding to an output voltage Vout decreases to be lower than a reference voltage Vref, a control circuit 410 turns on an NMOS transistor 420 for a predetermined time. As a result, the output voltage Vout increases. When the output voltage Vout is decreased by an effect of a load and the feedback voltage Vref becomes lower than the reference voltage Vref, the control circuit 410 again turns on the NMOS transistor 420 for the predetermined time. Such an operation is repeated, thereby generating the output voltage Vout of the target level.
In the ripple converter 300, a ceramic capacitor 440 with smaller ESR (Equivalent Series Resistance) is occasionally employed to reduce a ripple voltage of an output voltage Vout. In such a case, since the ripple voltage contained in the feedback voltage Vfb is reduced, which may leads to unstable operation of the ripple converter 300. Thus, in order to operate the ripple converter 300 in a stable manner, an adjusting circuit (not shown) is used that is configured to adjust a gain and a phase of the feedback voltage Vfb and a circuit (not shown) that is configured to generate the ripple voltage based on a current applied to the inductor 430 to be added to the feedback voltage Vfb, for example (see Japanese Laid-Open Patent Publication No. 2004-104942).
However, for example, if the ripple voltage is added to the feedback voltage Vfb so as to operate the ripple converter 300 in a steady manner, the output voltage Vout may significantly change from a target level when a load condition changes in a transient manner or under no-load condition, for example.
Specifically, as illustrated in FIG. 20, if a load condition is changed from a heavy load to a light load at time t100, the output voltage Vout is overshot, thereby rapidly increasing the feedback voltage Vfb as well. For example, if the ripple voltage is not added to the feedback voltage Vfb, the feedback voltage Vfb slowly decreases at time t100 and thereafter, as indicated by a dashed line. Since the NMOS transistor 420 is not turned on until the feedback voltage Vfb reaches the reference voltage Vref, the output voltage Vout also slowly decreases as indicated by a dashed line.
On the other hand, if the ripple voltage is added to the feedback voltage Vfb, the feedback voltage Vfb rapidly decreases as indicated by a solid line. When the feedback voltage Vfb reaches the reference voltage Vref at time t101, the NMOS transistor 420 is turned on. That is to say, in this case, the NMOS transistor 420 is turned on, even though the output voltage Vout is at a level higher than the target level. Thus, such a problem occurs that the output voltage Vout significantly deviates from the target level.